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9 changes: 6 additions & 3 deletions src/cpu/riscv_csr.c
Original file line number Diff line number Diff line change
Expand Up @@ -425,8 +425,9 @@ static void riscv_update_fcsr(rvvm_hart_t* vm, uint32_t old_fcsr, uint32_t new_f
uint32_t new_fflags = bit_cut(new_fcsr, 0, 5);
if (unlikely(new_frm != old_frm)) {
if (new_frm > RM_RMM) {
// Invalid rounding mode written
return;
// Invalid rounding mode written: keep the old FRM value per
// WARL semantics, but still apply the other fields of fcsr
new_frm = old_frm;
} else {
// Set host rounding mode
fpu_set_rounding_mode(new_frm);
Expand All @@ -438,7 +439,9 @@ static void riscv_update_fcsr(rvvm_hart_t* vm, uint32_t old_fcsr, uint32_t new_f
fpu_set_exceptions(0);
}
}
vm->csr.fcsr = new_fcsr;
// Reconstruct fcsr from the patched frm/fflags so every path shares
// the same writeback (reserved frm keeps the old value via WARL)
vm->csr.fcsr = (new_fcsr & ~CSR_FCSR_MASK) | new_fflags | (new_frm << 5);
}
}

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