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riscv: preserve fflags when rejecting a reserved frm value - #280

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riscv: preserve fflags when rejecting a reserved frm value#280
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carlosqwqqwq:fix/fcsr-reserved-frm-fflags

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riscv: preserve fflags when rejecting a reserved frm value

Fixes #274

Commit message

riscv: preserve fflags when rejecting a reserved frm value

Description

riscv_update_fcsr() currently returns before committing the writable fflags field when the incoming frm value is reserved. Keep the old/WARL frm value and continue applying the independent fflags bits. The change is limited to src/cpu/riscv_csr.c; the probe and research logs are not part of the upstream change.

Validation

  • The witness runs on native RISC-V hardware and QEMU and on the affected RVVM build; the isolated patched build matches both references.
  • Both the interpreter and JIT lanes were exercised, and the patched build is limited to this root.

Comment thread src/cpu/riscv_csr.c Outdated
return;
// Invalid rounding mode written: keep the old FRM value per
// WARL semantics, but still apply the other fields of fcsr
new_fcsr = bit_replace(new_fcsr, 5, 3, old_frm);

@purplesyringa purplesyringa Aug 12, 2026

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Maybe reconstruct new_fcsr from the patched new_frm/new_fflags once at writeback so that this isn't a path uncovered by most tests?

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Thanks! Reworked: fcsr is now reconstructed from the patched frm/fflags once at writeback (vm->csr.fcsr = (new_fcsr & ~CSR_FCSR_MASK) | new_fflags | (new_frm << 5)), so the reserved-frm path shares the same writeback as every other path. Rebuilt cleanly and force-pushed.

@carlosqwqqwq
carlosqwqqwq force-pushed the fix/fcsr-reserved-frm-fflags branch from 93b0a47 to 9e96a86 Compare August 12, 2026 23:53
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Writing a reserved frm value through fcsr silently drops the fflags update

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