riscv: apply JALR bit-zero semantics to C.JR and C.JALR

[carlosqwqqwq]

riscv: apply JALR bit-zero semantics to C.JR and C.JALR

Fixes #267

Commit message

riscv: apply JALR bit-zero semantics to C.JR and C.JALR

Description

C.JR and C.JALR expand to JALR, but the compressed path writes the raw odd target to PC. Mask bit 0 before the transfer in both compressed paths; the link register behavior remains unchanged.

Validation

• Native RV64 hardware and QEMU execute the odd-target controls at the aligned address.
• Interpreter and JIT paths are both validated against the references.
• The proposed change is limited to the compressed RISC-V decode path.