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kunalspathakkunalspathak
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NativeAOT/win/arm64: Fix the reloc type typo (#104516)
* Fix the reloc type typo * do not track tls_index reference * Update guid so the new collection contains correct reloc data * fix the code for Add * remove old code and add comment * jit format * Add Arm64 target in reproNative.vcxproj * jit format * review feedback * jit format
1 parent 2f0920c commit 922c2d8

11 files changed

Lines changed: 183 additions & 28 deletions

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‎src/coreclr/inc/jiteeversionguid.h‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -43,11 +43,11 @@ typedef const GUID *LPCGUID;
4343
#define GUID_DEFINED
4444
#endif // !GUID_DEFINED
4545

46-
constexpr GUID JITEEVersionIdentifier = { /* 273ba350-32bf-4714-beb0-7fa46c11364d */
47-
0x273ba350,
48-
0x32bf,
49-
0x4714,
50-
{0xbe, 0xb0, 0x7f, 0xa4, 0x6c, 0x11, 0x36, 0x4d}
46+
constexpr GUID JITEEVersionIdentifier = { /* 488a17ce-26c9-4ad0-a7b7-79bf320ea4d1 */
47+
0x488a17ce,
48+
0x26c9,
49+
0x4ad0,
50+
{0xa7, 0xb7, 0x79, 0xbf, 0x32, 0x0e, 0xa4, 0xd1}
5151
};
5252

5353
//////////////////////////////////////////////////////////////////////////////////////////////////////////

‎src/coreclr/jit/codegenarm64.cpp‎

Lines changed: 13 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -2236,18 +2236,12 @@ void CodeGen::instGen_Set_Reg_To_Imm(emitAttr size,
22362236
// reg cannot be a FP register
22372237
assert(!genIsValidFloatReg(reg));
22382238

2239-
emitAttr origAttr = size;
22402239
if (!compiler->opts.compReloc)
22412240
{
22422241
size = EA_SIZE(size); // Strip any Reloc flags from size if we aren't doing relocs
22432242
}
22442243

2245-
if (compiler->IsTargetAbi(CORINFO_NATIVEAOT_ABI) && EA_IS_CNS_SEC_RELOC(origAttr))
2246-
{
2247-
// This emits pair of `add` instructions for TLS reloc
2248-
GetEmitter()->emitIns_Add_Add_Tls_Reloc(size, reg, imm DEBUGARG(gtFlags));
2249-
}
2250-
else if (EA_IS_RELOC(size))
2244+
if (EA_IS_RELOC(size))
22512245
{
22522246
// This emits a pair of adrp/add (two instructions) with fix-ups.
22532247
GetEmitter()->emitIns_R_AI(INS_adrp, size, reg, imm DEBUGARG(targetHandle) DEBUGARG(gtFlags));
@@ -2764,6 +2758,18 @@ void CodeGen::genCodeForBinary(GenTreeOp* tree)
27642758
genProduceReg(tree);
27652759
return;
27662760
}
2761+
else if (compiler->IsTargetAbi(CORINFO_NATIVEAOT_ABI) && TargetOS::IsWindows &&
2762+
op2->IsIconHandle(GTF_ICON_SECREL_OFFSET))
2763+
{
2764+
// This emits pair of `add` instructions for TLS reloc on windows/arm64/nativeaot
2765+
assert(op2->AsIntCon()->ImmedValNeedsReloc(compiler));
2766+
2767+
emitAttr attr = emitActualTypeSize(targetType);
2768+
attr = EA_SET_FLG(attr, EA_CNS_RELOC_FLG | EA_CNS_SEC_RELOC);
2769+
2770+
emit->emitIns_Add_Add_Tls_Reloc(attr, targetReg, op1->GetRegNum(), op2->AsIntCon()->IconValue());
2771+
return;
2772+
}
27672773

27682774
instruction ins = genGetInsForOper(tree->OperGet(), targetType);
27692775

‎src/coreclr/jit/emitarm64.cpp‎

Lines changed: 25 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -3756,6 +3756,7 @@ void emitter::emitIns_R(instruction ins, emitAttr attr, regNumber reg, insOpts o
37563756
// gtFlags - DEBUG only gtFlags.
37573757
//
37583758
void emitter::emitIns_Add_Add_Tls_Reloc(emitAttr attr,
3759+
regNumber targetReg,
37593760
regNumber reg,
37603761
ssize_t imm DEBUGARG(GenTreeFlags gtFlags /* = GTF_EMPTY */))
37613762
{
@@ -3777,7 +3778,7 @@ void emitter::emitIns_Add_Add_Tls_Reloc(emitAttr attr,
37773778
id->idInsOpt(INS_OPTS_LSL12);
37783779
id->idAddr()->iiaAddr = (BYTE*)imm;
37793780

3780-
id->idReg1(reg);
3781+
id->idReg1(targetReg);
37813782
id->idReg2(reg);
37823783

37833784
// Since this is relocation, set to 8 byte size.
@@ -3804,7 +3805,7 @@ void emitter::emitIns_Add_Add_Tls_Reloc(emitAttr attr,
38043805
id->idInsFmt(fmt);
38053806
id->idAddr()->iiaAddr = (BYTE*)imm;
38063807

3807-
id->idReg1(reg);
3808+
id->idReg1(targetReg);
38083809
id->idReg2(reg);
38093810

38103811
// Since this is relocation, set to 8 byte size.
@@ -11349,7 +11350,7 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp)
1134911350
else
1135011351
{
1135111352
// This is second "add" of "add/add" pair
11352-
emitRecordRelocation(odst, id->idAddr()->iiaAddr, IMAGE_REL_ARM64_SECREL_LOW12L);
11353+
emitRecordRelocation(odst, id->idAddr()->iiaAddr, IMAGE_REL_ARM64_SECREL_LOW12A);
1135311354
}
1135411355
}
1135511356
else
@@ -13539,13 +13540,32 @@ void emitter::emitDispInsHelp(
1353913540
if (id->idIsReloc())
1354013541
{
1354113542
assert(ins == INS_add);
13542-
printf("[LOW RELOC ");
13543+
13544+
if (emitComp->IsTargetAbi(CORINFO_NATIVEAOT_ABI) && TargetOS::IsWindows && id->idIsTlsGD())
13545+
{
13546+
printf("[HIGH RELOC ");
13547+
}
13548+
else
13549+
{
13550+
printf("[LOW RELOC ");
13551+
}
13552+
1354313553
emitDispImm((ssize_t)id->idAddr()->iiaAddr, false);
1354413554
printf("]");
1354513555
}
1354613556
else
1354713557
{
13548-
emitDispImmOptsLSL(emitGetInsSC(id), insOptsLSL12(id->idInsOpt()), 12);
13558+
if (emitComp->IsTargetAbi(CORINFO_NATIVEAOT_ABI) && TargetOS::IsWindows && id->idIsTlsGD())
13559+
{
13560+
assert(ins == INS_add);
13561+
printf("[LOW RELOC ");
13562+
emitDispImm((ssize_t)id->idAddr()->iiaAddr, false);
13563+
printf("]");
13564+
}
13565+
else
13566+
{
13567+
emitDispImmOptsLSL(emitGetInsSC(id), insOptsLSL12(id->idInsOpt()), 12);
13568+
}
1354913569
}
1355013570
break;
1355113571

‎src/coreclr/jit/emitarm64.h‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1455,7 +1455,10 @@ void emitIns_R_I(instruction ins,
14551455
insOpts opt = INS_OPTS_NONE,
14561456
insScalableOpts sopt = INS_SCALABLE_OPTS_NONE DEBUGARG(size_t targetHandle = 0)
14571457
DEBUGARG(GenTreeFlags gtFlags = GTF_EMPTY));
1458-
void emitIns_Add_Add_Tls_Reloc(emitAttr attr, regNumber reg, ssize_t imm DEBUGARG(GenTreeFlags gtFlags = GTF_EMPTY));
1458+
void emitIns_Add_Add_Tls_Reloc(emitAttr attr,
1459+
regNumber targetReg,
1460+
regNumber reg,
1461+
ssize_t imm DEBUGARG(GenTreeFlags gtFlags = GTF_EMPTY));
14591462

14601463
void emitInsSve_R_I(instruction ins,
14611464
emitAttr attr,

‎src/coreclr/jit/helperexpansion.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -595,7 +595,7 @@ bool Compiler::fgExpandThreadLocalAccessForCallNativeAOT(BasicBlock** pBlock, St
595595

596596
CORINFO_CONST_LOOKUP tlsIndexObject = threadStaticInfo.tlsIndexObject;
597597

598-
GenTree* dllRef = gtNewIconHandleNode((size_t)tlsIndexObject.handle, GTF_ICON_OBJ_HDL);
598+
GenTree* dllRef = gtNewIconHandleNode((size_t)tlsIndexObject.handle, GTF_ICON_CONST_PTR);
599599
dllRef = gtNewIndir(TYP_INT, dllRef, GTF_IND_NONFAULTING | GTF_IND_INVARIANT);
600600
dllRef = gtNewCastNode(TYP_I_IMPL, dllRef, true, TYP_I_IMPL);
601601
dllRef = gtNewOperNode(GT_LSH, TYP_I_IMPL, dllRef, gtNewIconNode(3, TYP_I_IMPL));

‎src/coreclr/jit/lowerarmarch.cpp‎

Lines changed: 14 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -68,7 +68,20 @@ bool Lowering::IsContainableImmed(GenTree* parentNode, GenTree* childNode) const
6868
if (!childNode->IsCnsIntOrI())
6969
return false;
7070
if (childNode->AsIntCon()->ImmedValNeedsReloc(comp))
71-
return false;
71+
{
72+
if (comp->IsTargetAbi(CORINFO_NATIVEAOT_ABI) && TargetOS::IsWindows &&
73+
childNode->IsIconHandle(GTF_ICON_SECREL_OFFSET))
74+
{
75+
// for windows/arm64, the immediate constant should be contained because it gets
76+
// generated as part of ADD instruction that consumes this constant. See
77+
// emitIns_Add_Add_Tls_Reloc().
78+
return true;
79+
}
80+
else
81+
{
82+
return false;
83+
}
84+
}
7285

7386
// TODO-CrossBitness: we wouldn't need the cast below if GenTreeIntCon::gtIconVal had target_ssize_t type.
7487
target_ssize_t immVal = (target_ssize_t)childNode->AsIntCon()->gtIconVal;

‎src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -59,7 +59,7 @@ public enum RelocType
5959

6060
// Windows arm64 TLS access
6161
IMAGE_REL_ARM64_TLS_SECREL_HIGH12A = 0x10F, // ADD high 12-bit offset for tls
62-
IMAGE_REL_ARM64_TLS_SECREL_LOW12L = 0x110, // ADD low 12-bit offset for tls
62+
IMAGE_REL_ARM64_TLS_SECREL_LOW12A = 0x110, // ADD low 12-bit offset for tls
6363

6464
//
6565
// Relocations for R2R image production
@@ -536,7 +536,7 @@ public static unsafe void WriteValue(RelocType relocType, void* location, long v
536536
break;
537537
case RelocType.IMAGE_REL_BASED_ARM64_PAGEOFFSET_12A:
538538
case RelocType.IMAGE_REL_AARCH64_TLSDESC_ADD_LO12:
539-
case RelocType.IMAGE_REL_ARM64_TLS_SECREL_LOW12L:
539+
case RelocType.IMAGE_REL_ARM64_TLS_SECREL_LOW12A:
540540
PutArm64Rel12((uint*)location, (int)value);
541541
break;
542542
case RelocType.IMAGE_REL_BASED_LOONGARCH64_PC:
@@ -593,7 +593,7 @@ public static unsafe long ReadValue(RelocType relocType, void* location)
593593
return GetArm64Rel21((uint*)location);
594594
case RelocType.IMAGE_REL_BASED_ARM64_PAGEOFFSET_12A:
595595
case RelocType.IMAGE_REL_ARM64_TLS_SECREL_HIGH12A:
596-
case RelocType.IMAGE_REL_ARM64_TLS_SECREL_LOW12L:
596+
case RelocType.IMAGE_REL_ARM64_TLS_SECREL_LOW12A:
597597
return GetArm64Rel12((uint*)location);
598598
case RelocType.IMAGE_REL_AARCH64_TLSDESC_LD64_LO12:
599599
case RelocType.IMAGE_REL_AARCH64_TLSDESC_ADD_LO12:

‎src/coreclr/tools/Common/JitInterface/CorInfoImpl.cs‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3920,8 +3920,8 @@ private static RelocType GetRelocType(TargetArchitecture targetArchitecture, ush
39203920
const ushort IMAGE_REL_ARM64_BRANCH26 = 3;
39213921
const ushort IMAGE_REL_ARM64_PAGEBASE_REL21 = 4;
39223922
const ushort IMAGE_REL_ARM64_PAGEOFFSET_12A = 6;
3923+
const ushort IMAGE_REL_ARM64_SECREL_LOW12A = 9;
39233924
const ushort IMAGE_REL_ARM64_SECREL_HIGH12A = 0xA;
3924-
const ushort IMAGE_REL_ARM64_SECREL_LOW12L = 0xB;
39253925
const ushort IMAGE_REL_ARM64_TLSDESC_ADR_PAGE21 = 0x107;
39263926
const ushort IMAGE_REL_ARM64_TLSDESC_LD64_LO12 = 0x108;
39273927
const ushort IMAGE_REL_ARM64_TLSDESC_ADD_LO12 = 0x109;
@@ -3946,8 +3946,8 @@ private static RelocType GetRelocType(TargetArchitecture targetArchitecture, ush
39463946
return RelocType.IMAGE_REL_AARCH64_TLSDESC_CALL;
39473947
case IMAGE_REL_ARM64_SECREL_HIGH12A:
39483948
return RelocType.IMAGE_REL_ARM64_TLS_SECREL_HIGH12A;
3949-
case IMAGE_REL_ARM64_SECREL_LOW12L:
3950-
return RelocType.IMAGE_REL_ARM64_TLS_SECREL_LOW12L;
3949+
case IMAGE_REL_ARM64_SECREL_LOW12A:
3950+
return RelocType.IMAGE_REL_ARM64_TLS_SECREL_LOW12A;
39513951
default:
39523952
Debug.Fail("Invalid RelocType: " + fRelocType);
39533953
return 0;

‎src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/CoffObjectWriter.cs‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -355,7 +355,7 @@ private protected override void EmitRelocations(int sectionIndex, List<SymbolicR
355355
IMAGE_REL_BASED_ARM64_PAGEBASE_REL21 => IMAGE_REL_ARM64_PAGEBASE_REL21,
356356
IMAGE_REL_BASED_ARM64_PAGEOFFSET_12A => IMAGE_REL_ARM64_PAGEOFFSET_12A,
357357
IMAGE_REL_ARM64_TLS_SECREL_HIGH12A => IMAGE_REL_ARM64_SECREL_HIGH12A,
358-
IMAGE_REL_ARM64_TLS_SECREL_LOW12L => IMAGE_REL_ARM64_SECREL_LOW12L,
358+
IMAGE_REL_ARM64_TLS_SECREL_LOW12A => IMAGE_REL_ARM64_SECREL_LOW12A,
359359
IMAGE_REL_SECREL => IMAGE_REL_ARM64_SECREL,
360360
IMAGE_REL_SECTION => IMAGE_REL_ARM64_SECTION,
361361
_ => throw new NotSupportedException($"Unsupported relocation: {relocation.Type}")

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