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contrib/nodejs: try fix riscv build
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‎contrib/nodejs/patches/riscv-backport-refactor.patch‎

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From 13192d6e10fa726858056e49fc9bca6201401171 Mon Sep 17 00:00:00 2001
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From: Lu Yahan <yahan@iscas.ac.cn>
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Date: Tue, 5 Sep 2023 09:31:56 +0800
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Subject: [PATCH] [riscv][tagged-ptr] Convert more Objects to Tagged<>
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Port commit 064b9a7903b793734b6c03a86ee53a2dc85f0f80
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Bug: v8:12710
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Change-Id: If076ca5cd9e9d175c20fc3611e03d39c0260404d
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Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/4837830
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Reviewed-by: Ji Qiu <qiuji@iscas.ac.cn>
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Commit-Queue: Ji Qiu <qiuji@iscas.ac.cn>
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Auto-Submit: Yahan Lu <yahan@iscas.ac.cn>
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Cr-Commit-Position: refs/heads/main@{#89780}
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---
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src/builtins/riscv/builtins-riscv.cc | 2 +-
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src/codegen/riscv/assembler-riscv-inl.h | 15 ++++++++-------
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src/codegen/riscv/assembler-riscv.h | 2 +-
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src/execution/riscv/simulator-riscv.cc | 8 ++++----
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src/regexp/riscv/regexp-macro-assembler-riscv.cc | 2 +-
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5 files changed, 15 insertions(+), 14 deletions(-)
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diff --git a/src/builtins/riscv/builtins-riscv.cc b/src/builtins/riscv/builtins-riscv.cc
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index 326001fdd18..638001f9054 100644
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--- a/deps/v8/src/builtins/riscv/builtins-riscv.cc
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+++ b/deps/v8/src/builtins/riscv/builtins-riscv.cc
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@@ -1673,7 +1673,7 @@ static void Generate_InterpreterEnterBytecode(MacroAssembler* masm) {
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// Set the return address to the correct point in the interpreter entry
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// trampoline.
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Label builtin_trampoline, trampoline_loaded;
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- Smi interpreter_entry_return_pc_offset(
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+ Tagged<Smi> interpreter_entry_return_pc_offset(
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masm->isolate()->heap()->interpreter_entry_return_pc_offset());
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DCHECK_NE(interpreter_entry_return_pc_offset, Smi::zero());
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diff --git a/src/codegen/riscv/assembler-riscv-inl.h b/src/codegen/riscv/assembler-riscv-inl.h
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index 773dc560da1..8abf4b3239f 100644
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--- a/deps/v8/src/codegen/riscv/assembler-riscv-inl.h
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+++ b/deps/v8/src/codegen/riscv/assembler-riscv-inl.h
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@@ -128,9 +128,9 @@ Handle<HeapObject> Assembler::compressed_embedded_object_handle_at(
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}
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void Assembler::deserialization_set_special_target_at(
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- Address instruction_payload, Code code, Address target) {
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+ Address instruction_payload, Tagged<Code> code, Address target) {
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set_target_address_at(instruction_payload,
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- !code.is_null() ? code.constant_pool() : kNullAddress,
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+ !code.is_null() ? code->constant_pool() : kNullAddress,
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target);
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}
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@@ -159,12 +159,13 @@ void Assembler::deserialization_set_target_internal_reference_at(
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}
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}
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-HeapObject RelocInfo::target_object(PtrComprCageBase cage_base) {
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+Tagged<HeapObject> RelocInfo::target_object(PtrComprCageBase cage_base) {
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DCHECK(IsCodeTarget(rmode_) || IsEmbeddedObjectMode(rmode_));
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if (IsCompressedEmbeddedObject(rmode_)) {
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- return HeapObject::cast(Object(V8HeapCompressionScheme::DecompressTagged(
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- cage_base,
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- Assembler::target_compressed_address_at(pc_, constant_pool_))));
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+ return HeapObject::cast(
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+ Tagged<Object>(V8HeapCompressionScheme::DecompressTagged(
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+ cage_base,
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+ Assembler::target_compressed_address_at(pc_, constant_pool_))));
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} else {
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return HeapObject::cast(
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Object(Assembler::target_address_at(pc_, constant_pool_)));
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@@ -186,7 +187,7 @@ Handle<HeapObject> RelocInfo::target_object_handle(Assembler* origin) {
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}
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}
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-void RelocInfo::set_target_object(HeapObject target,
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+void RelocInfo::set_target_object(Tagged<HeapObject> target,
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ICacheFlushMode icache_flush_mode) {
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DCHECK(IsCodeTarget(rmode_) || IsEmbeddedObjectMode(rmode_));
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if (IsCompressedEmbeddedObject(rmode_)) {
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diff --git a/src/codegen/riscv/assembler-riscv.h b/src/codegen/riscv/assembler-riscv.h
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index 65c317ad018..ced4dd8aee8 100644
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--- a/deps/v8/src/codegen/riscv/assembler-riscv.h
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+++ b/deps/v8/src/codegen/riscv/assembler-riscv.h
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@@ -288,7 +288,7 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase,
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// This is for calls and branches within generated code. The serializer
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// has already deserialized the lui/ori instructions etc.
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inline static void deserialization_set_special_target_at(Address location,
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- Code code,
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+ Tagged<Code> code,
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Address target);
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// Get the size of the special target encoded at 'instruction_payload'.
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diff --git a/src/execution/riscv/simulator-riscv.cc b/src/execution/riscv/simulator-riscv.cc
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index 1baf9eb6c66..5b5411cb3e2 100644
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--- a/deps/v8/src/execution/riscv/simulator-riscv.cc
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+++ b/deps/v8/src/execution/riscv/simulator-riscv.cc
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@@ -1889,7 +1889,7 @@ void RiscvDebugger::Debug() {
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sreg_t value;
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StdoutStream os;
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if (GetValue(arg1, &value)) {
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- Object obj(value);
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+ Tagged<Object> obj(value);
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os << arg1 << ": \n";
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#ifdef DEBUG
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Print(obj, os);
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@@ -1938,7 +1938,7 @@ void RiscvDebugger::Debug() {
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PrintF(" 0x%012" PRIxPTR " : 0x%016" REGIx_FORMAT
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" %14" REGId_FORMAT " ",
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reinterpret_cast<intptr_t>(cur), *cur, *cur);
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- Object obj(*cur);
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+ Tagged<Object> obj(*cur);
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Heap* current_heap = sim_->isolate_->heap();
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if (IsSmi(obj) ||
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IsValidHeapObject(current_heap, HeapObject::cast(obj))) {
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@@ -4815,7 +4815,7 @@ bool Simulator::DecodeRvvVS() {
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Builtin Simulator::LookUp(Address pc) {
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for (Builtin builtin = Builtins::kFirst; builtin <= Builtins::kLast;
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++builtin) {
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- if (builtins_.code(builtin).contains(isolate_, pc)) return builtin;
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+ if (builtins_.code(builtin)->contains(isolate_, pc)) return builtin;
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}
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return Builtin::kNoBuiltinId;
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}
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@@ -4832,7 +4832,7 @@ void Simulator::DecodeRVIType() {
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if (builtin != Builtin::kNoBuiltinId) {
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auto code = builtins_.code(builtin);
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if ((rs1_reg() != ra || imm12() != 0)) {
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- if ((Address)get_pc() == code.instruction_start()) {
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+ if ((Address)get_pc() == code->instruction_start()) {
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sreg_t arg0 = get_register(a0);
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sreg_t arg1 = get_register(a1);
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sreg_t arg2 = get_register(a2);
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diff --git a/src/regexp/riscv/regexp-macro-assembler-riscv.cc b/src/regexp/riscv/regexp-macro-assembler-riscv.cc
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index 3b57e613eef..f60f03e5eee 100644
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--- a/deps/v8/src/regexp/riscv/regexp-macro-assembler-riscv.cc
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+++ b/deps/v8/src/regexp/riscv/regexp-macro-assembler-riscv.cc
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@@ -1216,7 +1216,7 @@ static T* frame_entry_address(Address re_frame, int frame_offset) {
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int64_t RegExpMacroAssemblerRISCV::CheckStackGuardState(Address* return_address,
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Address raw_code,
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Address re_frame) {
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- InstructionStream re_code = InstructionStream::cast(Object(raw_code));
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+ Tagged<InstructionStream> re_code = InstructionStream::cast(Object(raw_code));
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return NativeRegExpMacroAssembler::CheckStackGuardState(
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frame_entry<Isolate*>(re_frame, kIsolateOffset),
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static_cast<int>(frame_entry<int64_t>(re_frame, kStartIndexOffset)),

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